Memory

Physical memory is byte-addressable. And it’s divided into fixed-size frames.

Physical Memory Address

Physical memory address is composed of:

• Frame number
  Index into physical memory
• Offset
  Location within the frame

Addressing

There are 3 memory addressing modes in assembly language.

Direct Memory Addressing

Instruction contains the actual memory address. Memory location is accessed without any intermediate calculations.

Example:

MOV AX, [1000]  ; Load the value at memory address 1000 into register AX

Efficient for accessing fixed memory locations but lacks flexibility when working with dynamic data structures.

Indirect Memory Addressing

Uses a register that contains the memory address. Provides more flexibility compared to direct addressing.

Example:

MOV BX, 1000    ; Put address 1000 in register BX
MOV AX, [BX]    ; Load the value at the address contained in BX into AX

Allows for working with dynamic data structures and implementing concepts like pointers.

Displacement Memory Addressing

Combines direct and indirect addressing. Adds a fixed offset to a base memory address stored in a register.

Example:

MOV BX, 1000       ; Base address in BX
MOV AX, [BX + 20]  ; Access memory at address (1000 + 20)

Useful for:

• Writing position-independent code and efficiently accessing structured data.
• Accessing array elements
  BX points to the array base and the displacement is the offset of a specific element
• Working with data structures
  BX points to the structure base and the displacement accesses specific fields
• Implementing stack frames in function calls
  BX points to the stack frame and displacements access local variables and parameters

Virtual Memory

Go through Virtual Memory under Operating Systems as well for the best understanding.

Each process is given its own virtual address space. CPU generates virtual addresses, which are translated to physical addresses. Only the active parts of a program reside in physical RAM; the rest stays on disk (swap space).

Memory Management Unit

Aka. MMU. Translates virtual addresses to physical addresses. A hardware component.

Address Translation

The process of translating virtual addresses to physical addresses. Handled by MMU with help of paging.

Page Table Base Register

Aka. PTBR. Register that holds the base address of the page table.

Page Table Length Register

Aka. PTLR. Register that holds the size of the page table.

TLB

Short for Translation Lookaside Buffer. Aka. associative memory. A small cache inside the MMU that stores recent page table entries. Typically 64 to 1024 entires. Greatly reduces address translation time. Allows parallel search across entries.

On a TLB hit, address translation done in one cycle. Otherwise, page table is looked up.

Some TLBs store address-space identifiers (ASIDs) in each TLB entry. ASID uniquely identifies each process to provide address-space protection. Otherwise, each context switches would cause TLB to be flushed.